IBM Builds Sub-1 Nanometer Chip With 100 Billion Transistors

IBM announced a prototype chip Thursday — the first to use sub-1 nanometer process technology. It packs roughly 100 billion transistors into a fingernail-sized area, twice the density of IBM’s previous best, and could extend Moore’s Law — the decades-old observation that transistor counts double roughly every two years — for another decade. A nanometer is one-billionth of a meter; a human hair is roughly 80,000 nanometers wide.

IBM achieved the density using a new architecture it calls nanostack transistors, which layer components vertically rather than spreading them flat. The design could yield chips that are either faster or significantly more energy-efficient — IBM has not yet specified production timelines. Denser, more powerful chips are central to the US-China semiconductor competition, and advances at this scale could underpin the next generation of AI hardware. The chip remains a research prototype, and commercial manufacturing at sub-1nm has not been demonstrated.